1. Technical Field
Example embodiments relate to a semiconductor device and, more particularly, to a semiconductor memory cell array and a semiconductor memory device having the same.
2. Description of the Related Art
Generally, a semiconductor memory cell array includes a plurality of memory cells, a plurality of word-lines, and a plurality of bit-lines. Memory cells arranged in edge regions of the semiconductor memory cell array are used as dummy memory cells because the memory cells arranged in edge regions of the semiconductor memory cell array might not achieve characteristics required for normal operations. The dummy memory cells are coupled to a plurality of dummy word-lines and a plurality of dummy bit-lines.
As demand for higher integration degree and lower power consumption of the semiconductor memory device increases, noise caused by the dummy word-lines, the dummy bit-lines, and/or the dummy memory cells may negatively influence operation of actual memory cells in the semiconductor memory device.